Techniques for Testing Integrated Circuits

Author: DeBenedictis, Erik Penn

Year: 1983

Degree: Dissertation (Ph.D.)

Advisor: Seitz, Charles L.

Committee Members: Seitz, Charles L.; Bryant, Randy; Fox, Geoffrey C.; Johnsson, S. Lennart; Mead, Carver

Option: Computer Science

DOI: 10.7907/ZKWD-NR73

Abstract

A language is presented for describing tests of integrated circuits. The language has a high abstractive capability that enables test specifications to follow the structural or logical organization of a design. The test language is applied to a number of current design styles in a series of examples. Methods for designing integrated circuits for testability are demonstrated. An implementation of the test language through a test language interpreter and a tester is discussed. Tester designs are presented that will execute the test language with unusually high efficiency.

Files